Dr. DEVENDRA KUMAR SHARMA

Professor & Dean-SRM IST, Delhi NCR Campus

Phone Number: 0123-2234316

Email ID: dean@ncr.srmuniv.ac.in, dean@srmimt.net

Area or Subject: VLSI interconnects, Electronic Circuits, Digital Design, Testing, Signal Processing

Affiliation:  Department of Electronics & Communication Engineering, SRM Institute of Science and Technology, Delhi-NCR Campus

Education
Ph.D Electronics & Communication Engineering National Institute of Technology, Kurukshetra, February 2016
M.E Electronics & Communication Engineering Indian Institute of Technology, Roorkee, 1992
B.E. Electronics & Communication Engineering Motilal Nehru National Institute of Technology, Allahabad, 1989

Other Details

Courses

Digital Integrated Circuits, Electronics Circuits, Signals & Systems, Digital Signal Processing, Communication Systems, Microwave, Switching Theory & Logic Design

Research Interests

VLSI interconnects, Electronic Circuits, Digital Design, Testing, Signal Processing

Selected Publications

Journals
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “Impact of driver size and interwire parasitics on crosstalk noise and delay,” Journal of Engineering, Design and Technology, Emerald Pub., U.K, 12, issue 4, pp. 475-490, 2014 [Indexed in Scopus].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “Delay model for dynamically switching coupled on-chip interconnects,” Journal of Engineering, Design and Technology, Emerald Pub., U.K, 12, issue 3, pp. 364-373,  2014 [Indexed in Scopus].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “FDTD based transition time dependent crosstalk analysis for coupled RLC interconnects,” Journal of Semiconductors, IOP Pub., China, 35, no. 5, pp. 055001-5, May 2014 [Indexed in Scopus].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “Delay model for dynamically switching coupled RLC interconnects,” European Physical Journal-Applied Physics, 66, issue 1, Apr. 2014 [Indexed in SCI ].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “Signal integrity and propagation delay analysis using FDTD technique for VLSI interconnects,” Journal of Computational Electronics, Springer Pub., vol.13, issue 1, pp. 300-306, March 2014 [Indexed in SCI].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “Effect of coupling parasitics and CMOS driver width on transition time for dynamic inputs,” International Journal of Electronics (Taylor Francis), vol. 101, issue 5,  654-666, 2014 [Indexed in SCI].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “Effect of equal and mismatched signal transition time on power dissipation in global VLSI     interconnects,” International Journal of VLSI Design & Communication     Systems, 3, no. 4, pp. 111-119, Aug. 2012.
  • Devendra Kumar Sharma, R.K.Sharma, B.K.Kaushik and Pankaj Kumar, “Boundary scan based testing algorithm to detect interconnect faults in printed circuit boards” Circuit World, Emerald Pub., U.K, vol. 37, no. 3, pp. 27-34, 2011  [Indexed in SCI].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “VLSI interconnects and their testing –prospects and challenges ahead,” Journal of Engineering, Design and Technology, Emerald Pub., U.K, 9, issue 1, pp. 63-84, 2011 [Indexed in Scopus].
  • Devendra Kumar Sharma, R.K.Sharma and Suneel Yadav, “A noval approach for characterization of cardiac abnormalities using sub band coding,” International Journal of Applied Engineering Research, 4, no. 10, pp. 1931-1938, 2009. [Indexed in Scopus].
  • Devendra Kumar Sharma, B.K.Kaushik and R.K.Sharma, “Testing of CMOS Driven VLSI Interconnects”, Transmission line: Theory, Types and Applications, Book Chapter published by Nova Science Publishers, Inc., New York, USA, 309-336, 4th quarter, 2011, ISBN no. 978-1-61761-300-5 (Editor: Dana M. Welton) – [Book Chapter].

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International Conferences
  • Swati Sharma and Devendra Kumar Sharma “Design and Simulation of Quadrature Branch-Line Coupler for S Band Applications” in proceeding of 2nd IEEE International Conference on Micro-Electronics and Telecommunication Engineering” SRM IST NCR Campus, Ghaziabad, 20–21 September, 2018, pp. 240-245.
  • Rupali Singh and Devendra Kumar Sharma “Ultra Low Power Reversible Dual Edge Triggered Flip Flop-Design and Implementation” in proceeding of 2nd IEEE International Conference on Micro-Electronics and Telecommunication Engineering” SRM IST NCR Campus, Ghaziabad, 20– 21 September, 2018, pp. 264-270.
  • Devendra Kumar Sharma, Shailesh Mittal, B.K.Kaushik, R.K.SharmaL.Yadav­ and M.K.Majumder, “Dynamic crosstalk analysis in RLC modeled interconnects using FDTD method”, in Proc. IEEE International Conference on Computer and Communication Technology (ICCCT 2012), 23-25 Nov. 2012, MNNIT Allahabad, pp. 326-330.
  • Devendra Kumar Sharma,K.Kaushik and R.K.Sharma, “Analysis of equal and unequal transition time effects on power dissipation in coupled VLSI          interconnects”, in Proc. International Conference on Signal, Image Processing and Pattern Recognition (ICCSEA 2012), 25-27 May, 2012, Delhi, Advances in Computer Science, Engineering & Applications, Advances in Intelligent and Soft Computing, Springer Pub., vol. 166, 2012, pp. 137-144.
  • Devendra Kumar Sharma,K.Kaushik and R.K.Sharma, “Qualitative optimization of coupling parasitics and driver width in global VLSI interconnects”, in Proc. International Conference on Computer Science and Information Technology (CCSIT 2012), 2-4 January, 2012, Bangalore, Lecture Notes of the Institute for Computer Sciences, Social Informatics and Telecommunications Engineering (LNICST), Springer Pub.,vol. 85, 2012, pp. 1-10.
  • Devendra Kumar Sharma, Mittal, B.K. Kaushik, K.L. Yadav, M.K. Majumder, “ Crosstalk effect in coupled interconnect lines using FDTD method,” in Proc. IEEE International Conference on Communications, Devices and Intelligent Systems (CODIS), 2012, Jadavpur University, Kolkata, pp. 365-368.
  • Devendra Kumar Sharma,K.Kaushik and R.K.Sharma, “A qualitative approach to optimize coupling capacitance for simultaneously switching scenario in coupled VLSI interconnects,” in Proc. IEEE International Conference on Devices & Communication (ICDeCom-2011), 24-25 Feb. 2011, BIT Mesra, pp. 1-5.
  • Devendra Kumar Sharma,K.Kaushik and R.K.Sharma, “Effect of mutual inductance and coupling capacitance on propagation delay and peak overshoot in dynamically switching inputs,” in Proc. IEEE International Conference on Emerging Trends in Engineering and Technology (ICETET-2010), 19-21 Nov. 2010, BITS Goa, pp.765-769.
  • Devendra Kumar Sharma,K.Kaushik and R.K.Sharma, “Effect of aggressor driver width on crosstalk for static and dynamic switching of victim line,” in Proc. IEEE International Conference on Computer and Communication Technology (ICCCT 2010), 17-19 Sept. 2010, MNNIT Allahabad, pp. 667-672.
  • Devendra Kumar Sharma, Pankaj Kumar, K. Sharma,B. K. Kaushik, “A novel method for diagnosis of board level interconnect faults using boundary scan” in Proc. IEEE International Conference on Computer and Communication Technology ( ICCCT 2010), 17-19 Sept. 2010, MNNIT, Allahabad, pp. 270-275.
Working Papers
  • ” Fault Tolerant Reversible Gate Based Sequential QCA Circuits: Design and Contemplation ” under review at Journal of Computational Electronics, Springer Pub., 2018
  • “Design and performance analysis of reversible sequential circuits using quantum dot cellular automata”, Submitted at Journal of Semiconductors, IOP Science Publication, China.
Work in Progress
  • Ultra wideband micro strip patch antenna for wireless communication applications
  • Design and optimization of digital circuits using Adiabatic technique
Academic Experience
  • Professor & Dean, department of Electronics & Communication Engineering, S R M Institute of Science and Technology, Delhi NCR Campus, Ghaziabad, 02/05/2018
  • Professor, department of Electronics & Communication Engineering, Meerut Institute of Engineering & Technology, Meerut (affiliated to Dr. A.P.J. Abdul Kalam Technical University, Lucknow), 30/08/2007 – 28/04/2018
  • Associate Professor, department of Electronics & Communication Engineering, Meerut Institute of Engineering & Technology, Meerut (affiliated to Dr. A.P.J. Abdul Kalam Technical University, Lucknow), 01/01/2007 – 29/08/2007
  • Assistant Professor, department of Electronics & Communication Engineering, Meerut Institute of Engineering & Technology, Meerut (affiliated to Dr. A.P.J. Abdul Kalam Technical University, Lucknow), 01/10/2003 – 31/12/2006
  • Senior Lecture, department of Electronics & Communication Engineering, Meerut Institute of Engineering & Technology, Meerut (affiliated to Dr. A.P.J. Abdul Kalam Technical University, Lucknow), 30/10/2000 – 30/09/2003
Academic Administration Experience
  • Dean, S R M Institute of Science and Technology, Delhi NCR Campus, Ghaziabad from 02/05/2018 onwards
  • Dean Academics at Meerut Institute of Engineering & Technology, Meerut from 14/12/2017 to 28/04/2018
  • Head, department of Electronics & Communication Engineering, Meerut Institute of Engineering & Technology, Meerut, from 31/12/2004 to 13/12/2017
  • Other administrative responsibilities assigned from time to time include Centre Supdt. of Exams, Officer Incharge Training etc
  • Carried out NBA work to get the dept. accredited twice. Very much familiar with the new NBA system
  • Planned & developed various labs of the department at par with latest technological requirements
Research Work Supervised/ Supervising
  • Ph. D Supervising – 03
Other Professional Experience
  • Senior Engineer, R&D, Instrumentation Limited (A Public Sector Undertaking), 01/10/1996 – 18/10/2000
  • Engineer, Q.A. & testing and Engineering, Instrumentation Limited (A Public Sector Undertaking), 19/05/1993 – 30/09/1996
  • Management Trainee (Technical), Instrumentation Limited (A Public Sector Undertaking), 13/05/1992 – 18/05/1993
  • Deputed to CEERI, Pilani for 10 weeks technical knowhow transfer training on design, manufacturing & testing of Thick Film Hybrid Micro Circuits. Designed several HMCS/ ERNS, 1993
Workshop / Seminar/ Conferences organized
  • Conference Organizing Chair, 2nd IEEE International Conference on Micro-Electronics and Telecommunication Engineering, SRM IST NCR Campus, Ghaziabad, 20–21 September, 2018
  • Convener, Faculty Development Program on “Microcontroller Design”, by Texas Instruments Center of Excellence, Dept. of Electronics & Communication Engg., held on 7-9 December, 2017.
  • Convener, Faculty Development Program on “Linear Integrated Circuits – A System Approach, by Texas Instruments Centre of Excellence, Dept. of Electronics & Communication Engg., held on 30th May – 01June, 2016.
  • Convener, Faculty Development Program on “Embedded System Design using MSP 430”, by Texas Instruments Center of Excellence, Dept. of Electronics & Communication Engg., held on 2-4June, 2016.
  • Convener, AICTE sponsored Faculty Development Program on ‘VLSI Design: Recent Trends & Future Aspects”, by Dept. of Electronics & Communication Engg., held on 08-13 Oct., 2010.
Achievements and Awards
  • Institute (MIET) teaching appreciation reward for two consecutive sessions (the policy was in-effect for two sessions only), 2009, 2011
  • College Merit-cum-Means Scholarship during B.E. , 1985-1989
  • GATE Scholarship during M.E, 1990-1992
Memberships
  • Life member of ISTE (Membership no. LM50578)
  • Fellow member of IETE (Membership no. F201861)
  • Member of IEEE